Method of constructing CMOS vertically modulated wells (VMW) by clustered MeV BILLI (buried implanted layer for lateral isolation) implantation
US5501993A · kind A · utility
69Cited by
3References
21Claims
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Key dates
| Filing date | Nov 22, 1994 |
| Grant date | Mar 26, 1996 |
| Priority date | — |
| Expiry date | Nov 22, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/856
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
CMOS vertically modulated wells are constructed by using clustered MeV ion implantation to form a structure having a buried implanted layer for laterial isolation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.