Clock switcher circuit
US5502409A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1994 |
| Grant date | Mar 26, 1996 |
| Priority date | — |
| Expiry date | Dec 27, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clock switcher circuit for providing at least one set of clock signals selected from a plurality of clock sources. A first clock signal having a first pulse length and a second clock signal having a second pulse length are circuit inputs. Another circuit input is a clock selection input. When the clock selection input indicates a new output clock signal, different from the then current output clock signal, should be output by the circuit, the circuit provides a means for switching to output the new output clock signal. In switching to output the new output clock signal, the circuit prevents the occurrence of the output clock signal ever having a pulse shorter than the normal pulse length of the then current output clock signal, whether the then current output clock signal is the first clock signal or the second clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.