Phase detector and method
US5506874A · kind A · utility
18Cited by
11References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 1, 1993 |
| Grant date | Apr 9, 1996 |
| Priority date | — |
| Expiry date | Nov 1, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D13/003
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase detector 10 is disclosed herein. A clock signal CLK (OR I), a marker signal MARK (or Q) and a data signal D are provided. The data signal may comprise a periodic clock signal. Sampler circuitry 50 receives the clock signal CLK, the marker signal MARK and the data signal D and generates a sampled clock signal and a sampled marker signal. Sign modifier circuitry 52 then receives the sampled clock signal and sampled marker signal and generates first and second command signals. Select circuitry 54 receiving these command signals selects a valid command signal based upon the data signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.