Process for fabricating a device
US5508144A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 1995 |
| Grant date | Apr 16, 1996 |
| Priority date | — |
| Expiry date | Jun 20, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/95
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The invention is directed to a process for fabricating an integrated circuit. An imaging layer is deposited on a substrate. The imaging layer is an energy sensitive resist material. The energy sensitive resist material contains moieties that preferentially bind to refractory material. A latent image of a pattern is introduced into the imaging layer by patternwise exposing the imaging layer to energy. The patternwise exposure introduces a selectivity into the resist material that is exploited to bind refractory material preferentially to either the exposed resist material or the unexposed resist material, but not both. The refractory material forms an etch mask over the resist material to which it preferentially binds. This etch mask is then used to transfer a pattern that corresponds to the latent image into the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.