Method for forming a thin film transistor

US5510278A · kind A · utility

Assignee

• Motorola, Inc. · US

Inventors

• Bich-Yen Nguyen · Austin, US
• Thomas F. McNelly · Austin, US
• Philip J. Tobin · Austin, US
• James D. Hayden · Austin, US

Key dates

• Filing date: Sep 6, 1994
• Grant date: Apr 23, 1996
• Expiry date: Sep 6, 2014

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/109

Abstract

An under-gated thin film transistor (54) having low leakage current and a high on/off current ratio is formed using a composite layer (40) of semiconducting material. In one embodiment a composite layer (40) of semiconducting layer is formed by depositing two distinct layers (34, 38) of semiconducting material over the transistor gate electrode (18). The composite layer (40) is then patterned and implanted with ions to form a source region (46) and a drain region (48) within the composite layer (40), and to define a channel region (50) and an offset drain region (52) within the composite layer (40).