Probe apparatus and burn-in apparatus
US5510724A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 1994 |
| Grant date | Apr 23, 1996 |
| Priority date | — |
| Expiry date | May 31, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2849
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A loader section for supplying semiconductor wafers is arranged at one end of a linear first convey path for a convey unit. Burn-in test sections, probe test sections, a laser repair section, a deposition repair section, a marking section, a baking section, and visual test sections are arranged on both the sides of the first convey path. In the burn-in test section arranged in the loader section, each semiconductor wafer picked up from a cassette is pre-aligned. The pre-aligned semiconductor wafers are loaded/unloaded into/from the respective test sections and the repair section by the convey unit in accordance with a predetermined test procedure, thereby performing a plurality of test items and repair steps by an inline scheme. Each burn-in test section includes a probe card having conductive projections which are brought into contact with all of many semiconductor chips formed on each semiconductor wafer at once. Each burn-in test section performs burn-in tests on a plurality of semiconductor chips with which the conductive projections are brought into contact at once, while temperature/voltage stresses are applied to the semiconductor chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.