Wafer handling and processing system
US5511005A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 16, 1994 |
| Grant date | Apr 23, 1996 |
| Priority date | — |
| Expiry date | Feb 16, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system for semiconductor wafer processing including wafer measurement and characterization having vertical wafer processing apparatus with which only the edge of a wafer is contacted. A wafer processing station is provided having a support bridge to which a rotor subassembly is attached. The rotor subassembly includes a housing and a rotor having a central aperture and a retention mechanism for retaining a wafer in a measurement position. A pair of pivotable probe arms includes one probe arm positioned on either side of the wafer. A sensor provides an image of a wafer prior to its retention by the retention mechanism in the measurement position in order to permit the retention mechanism to avoid any flat on the wafer. Additional sensors eliminate the effect of wobble or vibration of the rotor on wafer measurement results. Artifact removal processors are provided for removing errors in the measured wafer data and a database stores the uncorrupted and corrected data. The system couples with a data network to allow global viewing of wafer processing trouble spots. A correlation of information from actual data and wafer processing simulation is provided for allowing the application o…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.