Manufacturing method for semiconductor integrated circuit device
US5512502A · kind A · utility
30Cited by
4References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1995 |
| Grant date | Apr 30, 1996 |
| Priority date | — |
| Expiry date | Mar 1, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/147
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In forming a MISFET having a salicide structure, a polysilicon film forming a gate electrode in the MISFET is constructed of a first silicon film having a high n-type impurity concentration on the side of a gate insulating film and a second silicon film having a low n-type impurity concentration on the surface side of the gate electrode. Further, a Ti film is deposited on the second silicon film. The Ti film and the second silicon film are annealed twice at proper different temperatures to thereby promote a silicide reaction and form a low-resistance silicide layer in the second silicon film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.