Method and apparatus for automatically configuring system memory address space of a computer system having a memory subsystem with indeterministic number of memory units of indeterministic sizes during system reset
US5513331A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 29, 1995 |
| Grant date | Apr 30, 1996 |
| Priority date | — |
| Expiry date | Mar 29, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0661
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for assigning memory address information in a computer system. The present invention relates to computer systems having a plurality of ports or slots for coupling boards or other apparatus accessible to a processor of the computer system. The computer system further comprises an address decoder electrically coupled with the ports and processor. The address decoder receives, preferably at the time the computer system is first powered on, memory size identifying information from each of the memory boards coupled with the plurality of slots. The address decoder assigns system address space to each of the individual memories.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.