Method for forming LDD CMOS with oblique implantation
US5516711A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 16, 1994 |
| Grant date | May 14, 1996 |
| Priority date | — |
| Expiry date | Dec 16, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/859
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and structure therefor for the formation of lightly doped drain regions, typically used in the manufacture of a field effect devices. The method includes the steps of providing a semiconductor substrate with a P type well region and an N type well region. Gate electrodes are formed overlying gate dielectric over each P type well and N type well regions. The method then performs a blanket N type implant step at an angle being about 20 degrees and greater from a perpendicular to the gate electrodes into both the P type and N type well regions. The blanket N type implant forms an LDD region in the P type well, and a buried region in the N type well. Sidewall spacers are then formed on edges of the gate electrodes. An N type implant step is then performed on the P type well region to form the source/drain region of a NMOS device. The method then performs two separate P type implants into the N type well, each at different angles and dosages, to form the P type LDD source/drain region for a PMOS device. The PMOS device includes the buried region which acts as a punchthrough stop, typically used to decrease short channel effects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.