Non-volatile semiconductor memory device capable of electrically performing read and write operation and method of reading information from the same
US5517445A · kind A · utility
Inventors
Key dates
| Filing date | Oct 30, 1991 |
| Grant date | May 14, 1996 |
| Priority date | — |
| Expiry date | Oct 30, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device, includes a memory cell having a capacitor formed by stacking a semiconductor layer and a ferroelectric layer between a pair of electrodes, the semiconductor layer and the ferroelectric layer forming a semiconductor-ferroelectric junction, a writing circuit in which a voltage higher than a coercive electric field of the ferroelectric material is applied to the capacitor of the memory cell to align a polarization direction of the ferroelectric layer in a predetermined direction so as to set a capacitance of the capacitor at a predetermined value, thereby writing data corresponding to the predetermined value of the capacitance, and a reading circuit in which a voltage less than the coercive electric field of the ferroelectric layer is applied to the capacitor of the memory cell in which the data is written, thereby reading the data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.