Multiplexed status and diagnostic pins in a microprocessor with on-chip caches
US5517659A · kind A · utility
5Cited by
10References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 11, 1994 |
| Grant date | May 14, 1996 |
| Priority date | — |
| Expiry date | May 11, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/885
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a microprocessor, two output pins are dedicated to providing information to assist in diagnosing problems relating to internal instruction and data caches or the software executing in the caches. The information on the pins is time-multiplexed. In a first phase, the pins indicate whether the data or instruction cache is accessed and whether a cache miss has occurred. In a second phase, the pins carry signals identifying the address reference which resulted in a cache miss.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.