Spin-on-glass filled trench isolation method for semiconductor circuits
US5518950A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 1994 |
| Grant date | May 21, 1996 |
| Priority date | — |
| Expiry date | Sep 2, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76224
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of field isolation of a semiconductor circuit includes forming a silicon oxide layer over the surface of a substrate, depositing a layer of silicon nitride overlying said silicon oxide layer, patterning said silicon oxide and silicon nitride layers to provide openings and exposing portions of said substrate, forming trench regions in said openings, forming a spin-on-glass (SOG) layer over said silicon nitride layer and in said trench regions, curing and annealing at a first temperature the SOG layer after it is formed, oxidizing the SOG layer at a second temperature, wherein the second temperature is less than first temperature, and patterning the oxidized SOG layer to expose the oxidized SOG layer formed in the trench regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.