Semiconductor memory device with redundant memory cell backup
US5523974A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 21, 1994 |
| Grant date | Jun 4, 1996 |
| Priority date | — |
| Expiry date | Nov 21, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/789
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device comprises a main memory cell, a redundant memory cell, a redundant address data cell comprising a non-volatile memory which electrically memorizes an address of a redundant memory cell which replaced a failed memory cell in the main memory cell, a control circuit 15 and a redundant memory cell selecting circuit 16. The redundant memory cell selecting circuit serves to hold first address data which has been read from the redundant address data cell, and to compare the first address data with second address data for a read or write operation which is input via the control circuit and thereby select the main memory cell or the redundant memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.