Method of making a low voltage coefficient capacitor
US5525533A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 8, 1995 |
| Grant date | Jun 11, 1996 |
| Priority date | — |
| Expiry date | Feb 8, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/014
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention teaches a low voltage coefficient MOS capacitor, and a method of making such a capacitor, having substantially uniform parasitic effects over an operating voltage range and a low voltage coefficient. The capacitor comprises a first conductive layer superjacent a silicon on insulator ("SOI") substrate. The first conductive layer comprises heavily doped silicon having a first conductivity type, while the substrate comprises a second conductivity type. Further, the capacitor comprises an isolation trench surrounding the first conductive layer filled with a dielectric material. Positioned superjacent the first conductive layer is a dielectric layer, thereby forming a dielectric shell on all sides of the first conductive layer except for its upper face. Moreover, a second conductive layer is positioned superjacent the dielectric layer to form a low voltage coefficient capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.