Method and apparatus for streamlined testing of electrical circuits
US5526365A · kind A · utility
61Cited by
3References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 21, 1995 |
| Grant date | Jun 11, 1996 |
| Priority date | — |
| Expiry date | Feb 21, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318572
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A serial scan test architecture can perform testing of an electrical circuit without cycling through multiple data register shift operations required by conventional test architectures by permitting test signals to be transferred bidirectionally between serial scanning circuitry and functional circuitry while serial data is being transferred in a continuous serial data stream between the test controller and the serial scanning circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.