Method for filing substrate recesses using elevated temperature and pressure
US5527561A · kind A · utility
58Cited by
4References
4Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 16, 1994 |
| Grant date | Jun 18, 1996 |
| Priority date | — |
| Expiry date | Aug 16, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
To fill a hole or trench structure in an article, such as a semiconductor wafer, a layer is formed on the article. The layer extends over the structure so as to seal the mouth thereof. Then, the wafer and layer are subject to elevated pressure and elevated temperature such as to cause material of the layer to flow into the structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.