Address translator and method of operation
US5530822A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 4, 1994 |
| Grant date | Jun 25, 1996 |
| Priority date | — |
| Expiry date | Apr 4, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1036
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An address translator (126) translates addresses, acting like a register file or a table, as necessary. The address translator contains a number of entries for matching an input address to a stored tag. An entry outputs a stored translated address if its stored tag matches the input address. A decoder (138) selects a particular entry in which to store an input translated address when the address translator operates as a register file. In these cases, a register number is also stored in the particular entry's as the entry's tag. Later, when it is necessary to read the particular entry, the register number is compared to each entry's tag to find a match. The disclosed address translator is compatible with both hardware and software refill algorithms ("tablewalks") without impacting its critical read speed path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.