Access hints for input/output address translation mechanisms
US5535352A · kind A · utility
72Cited by
11References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 24, 1994 |
| Grant date | Jul 9, 1996 |
| Priority date | — |
| Expiry date | Mar 24, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/1081
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computing system includes a main memory and an input/output adapter. The input/output adapter accesses a translation map. The translation map maps input/output page numbers to memory address page numbers. Entries to the translation map are generated so that each entry includes an address of a data page in the main memory and transaction configuration information. The transaction configuration information is utilized by the input/output adapter during data transactions to and from the data page.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.