Michael L. Ziegler
45Patents
20h-index
61Co-inventors
88Inventor score
Filing activity: Apr 25, 1980 → Jul 31, 2012
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4794521A | Digital computer with cache capable of concurrently handling multiple accesses from parallel processors | Physics | 123 | Expired |
| US5586297A | Partial cache line write transactions in a computing system with a write back cache | Physics | 123 | Expired |
| US5530933A | Multiprocessor system for maintaining cache coherency by checking the coherency in the order of the transactions being issued on the bus | Physics | 95 | Expired |
| US5535352A | Access hints for input/output address translation mechanisms | Physics | 72 | Expired |
| US4783736A | Digital computer with multisection cache | Physics | 63 | Expired |
| US7771659B2 | Arrangement and method for the analysis of body fluids | Physics | 55 | Expired |
| US6199144A | Method and apparatus for transferring data in a computer system | Physics | 54 | Expired |
| US5133059A | Computer with multiple processors having varying priorities for access to a multi-element memory | Physics | 52 | Expired |
| US6708288B1 | Compiler-based checkpointing for support of error recovery | Physics | 49 | Expired |
| US4386399A | Data processing system | Physics | 46 | Expired |
| US6128706A | Apparatus and method for a load bias--load with intent to semaphore | Physics | 46 | Expired |
| US4380812A | Refresh and error detection and correction technique for a data processing system | Physics | 41 | Expired |
| US5737757A | Cache tag system for use with multiple processors including the most recently requested processor identification | Physics | 40 | Expired |
| US6874138B1 | Method and apparatus for resuming execution of a failed computer program | Physics | 38 | Expired |
| US6286095A | Computer apparatus having special instructions to force ordered load and store operations | Physics | 37 | Expired |
| US4513372A | Universal memory | Physics | 36 | Expired |
| US6473845B1 | System and method for dynamically updating memory address mappings | Physics | 26 | Expired |
| US4398243A | Data processing system having a unique instruction processor system | Physics | 24 | Expired |
| US4622630A | Data processing system having unique bus control protocol | Physics | 22 | Expired |
| US5528766A | Multiple arbitration scheme | Physics | 20 | Expired |
| US8940252B2 | Rack apparatus for a sample distribution system | Physics | 17 | Active |
| US5515522A | Coherence index generation for use by an input/output adapter located outside of the processor to detect whether the updated version of data resides within the cache | Physics | 16 | Expired |
| US5519838A | Fast pipelined distributed arbitration scheme | Physics | 16 | Expired |
| US4493033A | Dual port cache with interleaved read accesses during alternate half-cycles and simultaneous writing | Physics | 15 | Expired |
| US6304932A | Queue-based predictive flow control mechanism with indirect determination of queue fullness | Physics | 12 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.