Field programmable gate array transferring signals at high speed
US5541529A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 1995 |
| Grant date | Jul 30, 1996 |
| Priority date | — |
| Expiry date | May 25, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17704
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A field programmable gate array includes a logic blocks, switching elements for establishing a signal propagation path, and memory cells provided corresponding to the switching elements for storing data determining on and off states of corresponding switching elements. In this gate array, a supply voltage fed to a power input terminal is transmitted to power supply nodes of logic circuit blocks. A booster circuit boosts the supply voltage fed to the power input terminal and feeds the boosted voltage to power supply nodes of memory cells for programming a signal propagation path. A high-level signal potential of each memory cell is fed to the gate of an n-channel MOS transistor which functions as the switching element. The switching elements are disposed on signal lines and serve to interconnect the signal lines selectively to establish a signal propagation path. The current supply capability of the MOS transistors is enhanced to realize faster propagation of the signal, and any harmful influence of the threshold voltage exerted on the signal amplitude loss can be suppressed by a rise of the gate potential in each MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.