Controlled recrystallization of buried strap in a semiconductor memory device
US5543348A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Mar 29, 1995 |
| Grant date | Aug 6, 1996 |
| Priority date | — |
| Expiry date | Mar 29, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/038
Abstract
A method of forming a coupled capacitor and transistor is provided. A trench is formed in a semiconductor substrate and an impurity-doped first conductive region is then formed by filling the trench with an impurity-doped first conductive material. The impurity-doped first conductive region is etched back to a first level within the trench. An insulating layer is then formed on a sidewall of the portion of the trench opened by the etching back of the impurity-doped first conductive region and a second conductive region is formed by filling the remainder of the trench with a second conductive material. The insulating layer and the second conductive region are etched back to a second level within the trench and an amorphous silicon layer is formed in the portion of the trench opened by the etching back of the insulating layer and the second conductive region. The undoped amorphous silicon layer is etched back to a third a level within the trench. The undoped amorphous silicon layer is then recrystallized. Impurities are outdiffused from the impurity-doped first conductive region to the semiconductor substrate through the recrystallized silicon layer. A source/drain region of the tran…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.