Dynamic and preset static multiplexer in front of latch circuit for use in static circuits
US5543731A · kind A · utility
18Cited by
7References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 31, 1995 |
| Grant date | Aug 6, 1996 |
| Priority date | — |
| Expiry date | Mar 31, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/693
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A latch circuit. The circuit includes a static digital logic circuit, comprising a multiplexer having a plurality of static input data lines and one or more select lines for selecting data from one of the input lines as multiplexer output data; latching means for latching output data from the multiplexer; wherein the multiplexer is not a static circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.