High-speed CMOS pseudo-ECL output driver
US5548230A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 1994 |
| Grant date | Aug 20, 1996 |
| Priority date | — |
| Expiry date | Jun 1, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0266
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A complementary metal oxide silicon (CMOS) data to emitter coupled logic (ECL) data translator system comprised of translator apparatus for receiving data signals from a CMOS circuit powered from a CMOS voltage power source, apparatus for powering an ECL circuit from the power source, a transmission line carrying output signals from the translator apparatus to the ECL circuit, having a predetermined characteristic, a load having the characteristic impedance connecting the transmission line to the power source, and the translator apparatus comprising apparatus for outputting a data signal on the transmission line which corresponds to the received data signals but having an amplitude compatible with the ECL circuit and referenced to a voltage of the power source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.