Brian D. Gerson
10Patents
9h-index
15Co-inventors
61Inventor score
Filing activity: Jun 1, 1994 → Apr 13, 2000
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5512860A | Clock recovery phase locked loop control using clock difference detection and forced low frequency startup | Emerging Cross-Sectional Technologies | 57 | Expired |
| US5835501A | Built-in test scheme for a jitter tolerance test of a clock and data recovery unit | Electricity | 44 | Expired |
| US5548230A | High-speed CMOS pseudo-ECL output driver | Electricity | 42 | Expired |
| US5905386A | CMOS SONET/ATM receiver suitable for use with pseudo ECL and TTL signaling environments | Electricity | 41 | Expired |
| US6188692A | Integrated user network interface device for interfacing between a sonet network and an ATM network | Electricity | 30 | Expired |
| US6342790B1 | High-speed, adaptive IDDQ measurement | Physics | 25 | Expired |
| US5734541A | Low voltage silicon controlled rectifier structure for ESD input pad protection in CMOS IC's | Electricity | 11 | Expired |
| US6104277A | Polysilicon defined diffused resistor | Electricity | 11 | Expired |
| US6088369A | Line coding technique for efficient transmission and delineation of encapsulated frames over high speed data links | Electricity | 9 | Expired |
| US5793225A | CMOS SONET/ATM receiver suitable for use with pseudo ECL and TTL signaling environments | Electricity | 7 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.