Vertex minimization in a smart optical proximity correction system
US5553273A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 17, 1995 |
| Grant date | Sep 3, 1996 |
| Priority date | — |
| Expiry date | Apr 17, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70441
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An optical proximity correction (OPC) routine that enhances the fidelity of VLSI pattern transfer operations such as photolithography and reactive ion etch (RIE) by predistorting the mask while biasing only critical features and eliminating, as much as possible, the creation of additional vertices. The OPC routine accomplishes corrections in a timely and cost effective manner on realistic data sets without causing unnecessary increase in data volume. The OPC method employs a series of shrink, expand and subtraction operations that separate complex computer aided design (CAD) data for a lithography mask or reticle into sets of basic rectangles. More particularly, the OPC method first identifies a plurality of gate regions in a CAD design. A plurality of design shapes in the CAD design are sorted according to geometric type. A plurality of sorted design shapes share at least one side with a second design shape. The sorted design shapes are then grouped according to width. Finally, all of the grouped design shapes having been identified as gate regions are biased based on applicable OPC rules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.