Semiconductor device comprising a grounding pad near a reference signal pad and a capacitor between the pads
US5557235A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 14, 1994 |
| Grant date | Sep 17, 1996 |
| Priority date | — |
| Expiry date | Nov 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00346
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a semiconductor device comprising on a semiconductor substrate (41) first and second input buffers (21), first and second input signal connections (25) supplying the input buffers from input signal pads (23) with input signals, respectively, each with a buffer input level, and first and second reference signal connections (29) supplying a reference signal from a reference signal pad (27) to the input buffers with buffer reference levels, respectively, a grounding pad (71) is laid near the reference signal pad and supplied with a ground level for the semiconductor device with a capacitor (73) connected between the semiconductor substrate and each reference signal connection near the reference signal pad and preferably with the reference signal connections laid geometrically parallel to the input signal connections. If lengthy, each reference signal connection comprises a first part laid parallel to a pertinent one of the input signal connections between a relevant one of the input buffers and a node (69) and a second part extended from the node to the reference signal pad. Each input buffer can produce an output signal of a CMOS level when each input signal connection is supplied…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.