Method and apparatus for capping metallization layer
US5559056A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 13, 1995 |
| Grant date | Sep 24, 1996 |
| Priority date | — |
| Expiry date | Jan 13, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating bond pads on a semiconductor device that reduces intermetallic growth between a metallization layer and a bonding layer is discussed. Initially a metallization layer is deposited over a substrate. Following steps include depositing a barrier layer over the metallization layer, masking a portion of the barrier layer, and etching the barrier layer and the metallization layer. Etching of the barrier and masking layers is performed utilizing the barrier layer mask as a mask for both the barrier layer and the metallization layer. Further steps include depositing a non-conductive layer conformally overlying the barrier layer, masking a portion of the non-conductive layer, and etching the non-conductive layer. Etching the non-conductive layer forms an exposed region of the barrier layer. A later step of this method includes forming a bond layer over the exposed region of the barrier layer, with one possible formation method utilizing an electrolysis process. Thus a bond pad with a capped metallization layer is produced with only two mask and etch steps. This bond pad will withstand ambient temperatures up to approximately 200.degree. C.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.