Method for increasing the performance of lines drawn into a framebuffer memory
US5559953A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 1, 1994 |
| Grant date | Sep 24, 1996 |
| Priority date | — |
| Expiry date | Jul 1, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T11/203
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for storing pixel data in a video memory having a plurality of slices increases the performance of line drawing by ensuring that for a given pixel, neighboring pixels in neighboring scan lines are stored in separate slices of video memory. One embodiment of the invention includes the step of appending a number of offset bits to the end of each scan line, where the number of offset bits is less than the total number of bits contained in the plurality of slices. Another embodiment of the invention rearranges the pixels of every other scan line. Another embodiment adds an offset number of pixels which is equal to the number of pixels per slice times the number of slices, then alternates ordered pixels with rearranged pixels throughout successive scan lines. Performance is further increased by providing a plurality of memory controllers corresponding to the plurality of slices of memory which may operate asynchronously to interleave memory access commands. Therefore, during line draw operations successive pixels which reside in different slices of memory may be accessed in one command, and subsequent accesses may be interleaved to further increase the performanc…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.