Joel J. McCormack
27Patents
14h-index
45Co-inventors
81Inventor score
Filing activity: Jul 1, 1994 → Sep 26, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6204859A | Method and apparatus for compositing colors of images with memory constraints for storing pixel data | Physics | 184 | Expired |
| US6128000A | Full-scene antialiasing using improved supersampling techniques | Physics | 114 | Expired |
| US6112318A | Performance counters controlled by programmable logic | Physics | 77 | Expired |
| US6292193A | Techniques for anisotropic texture mapping using multiple space-invariant filtering operations per pixel | Physics | 73 | Expired |
| US6633297B2 | System and method for producing an antialiased image using a merge buffer | Physics | 65 | Expired |
| US6112267A | Hierarchical ring buffers for buffering data between processor and I/O device permitting data writes by processor and data reads by I/O device simultaneously directed at different buffers at different levels | Physics | 49 | Expired |
| US5781201A | Method for providing improved graphics performance through atypical pixel storage in video memory | Physics | 40 | Expired |
| US5870109A | Graphic system with read/write overlap detector | Physics | 37 | Expired |
| US5559953A | Method for increasing the performance of lines drawn into a framebuffer memory | Physics | 35 | Expired |
| US6714196B2 | Method and apparatus for tiled polygon traversal | Physics | 28 | Expired |
| US6085292A | Apparatus and method for providing non-blocking pipelined cache | Physics | 21 | Expired |
| US6329977A | Pre-filtered antialiased lines using distance functions | Physics | 20 | Expired |
| US7336283B2 | Efficient hardware A-buffer using three-dimensional allocation of fragment memory | Physics | 18 | Expired |
| US5696945A | Method for quickly painting and copying shallow pixels on a deep frame buffer | Physics | 15 | Expired |
| US9348762B2 | Technique for accessing content-addressable memory | Physics | 9 | Active |
| US7649538B1 | Reconfigurable high performance texture pipeline with advanced filtering | Physics | 8 | Active |
| US7916149B1 | Block linear memory ordering of texture data | Physics | 6 | Active |
| US7081903B2 | Efficient movement of fragment stamp | Physics | 5 | Expired |
| US8930636B2 | Relaxed coherency between different caches | Physics | 4 | Active |
| US6109777A | Division with limited carry-propagation in quotient accumulation | Physics | 3 | Expired |
| US7884831B2 | Reconfigurable high-performance texture pipeline with advanced filtering | Physics | 3 | Active |
| US9595075B2 | Load/store operations in texture hardware | Physics | 2 | Active |
| US8456481B2 | Block linear memory ordering of texture data techniques | Physics | 1 | Active |
| US8436868B2 | Block linear memory ordering of texture data | Physics | 1 | Active |
| US9448935B2 | Surface resource view hash for coherent cache operations in texture processing hardware | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.