Dielectric element isolated semiconductor device and a method of manufacturing the same
US5561077A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 21, 1995 |
| Grant date | Oct 1, 1996 |
| Priority date | — |
| Expiry date | Sep 21, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/981
Abstract
A high-breakdown voltage semiconductor device and a fabrication method are disclosed. A dielectric layer (3) dielectrically isolates a semiconductor substrate (1) from a n.sup.- type semiconductor layer (2). An n.sup.+ type semiconductor region (4) having a lower resistance than the n.sup.- type semiconductor layer (2) is formed as if surrounded by a p.sup.+ type semiconductor region (5). The dielectric layer (3) consists of a relatively thick first region (3a) and a relatively thin first region (3b). The n.sup.+ type semiconductor region (4), which is located above the first region (3a), occupies a narrower area than the first region (3a). Thus, by forming the dielectric layer thick immediately under the first semiconductor layer and controlling the thickness of the dielectric layer at other portions, the breakdown voltage of the semiconductor device is improved without curbing RESURF effect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.