Method of manufacturing a semiconductor device
US5563085A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 25, 1994 |
| Grant date | Oct 8, 1996 |
| Priority date | — |
| Expiry date | Oct 25, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/37
Abstract
In formation of a DRAM, a silicon nitride film is used as a mask to simultaneously expose a semiconductor substrate serving as an active region where an MOSFET is formed and a portion of the periphery of a trench. Therefore, even if the alignment offset of a resist pattern occurs, an interval between adjacent memory cells does not change. The interval between the adjacent memory cells is constantly the same as that when no alignment offset of the resist patter occurs. That is, only an n-type diffusion layer of the memory cell formed at a position adjacent to the trench comes close to source and drain regions of the adjacent memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.