Parameterized generic multiplier complier
US5566079A · kind A · utility
12Cited by
13References
25Claims
0Family size
Assignee
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Key dates
| Filing date | Nov 12, 1992 |
| Grant date | Oct 15, 1996 |
| Priority date | — |
| Expiry date | Nov 12, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for producing a circuit layout comprising the steps of establishing high-level input parameters which identify input/output characteristics and high-level functional parameters of a data path, inputting the input parameters to a compiler, the compiler performing steps of creating a data path netlist by selecting data path components in response to the established high-level input parameters; and automatically selecting control logic for the data path components. The data path netlist is a high-level netlist of Boolean logic which can then easily be translated into a gate level implementation of the circuit layout.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.