Memory data protection for a ferroelectric memory
US5574679A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1995 |
| Grant date | Nov 12, 1996 |
| Priority date | — |
| Expiry date | Oct 27, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile ferroelectric memory device comprises a power supply and a memory cell array having a plurality of memory cells arranged in rows and columns and further comprises a plate-voltage level generator, a power supply voltage detector, and a protective control circuit. The plate-voltage level generator generates a plate voltage on a plate line connected to the one electrode of a ferroelectric capacitor of each memory cell. The power supply voltage detector detects a voltage of the power supply to generate a low-voltage detection signal when the power supply voltage is lower than a threshold voltage. The protective control circuit responsive to the low-voltage detection signal fixes the word lines at a grounding voltage level so as to protect the ferroelectric capacitor from a voltage change of the word line. The protective control circuit may fix the bit lines at the plate voltage level when the power supply voltage is lower than the threshold voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.