Via-structure of a multilayer interconnection ceramic substrate
US5576518A · kind A · utility
18Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 1995 |
| Grant date | Nov 19, 1996 |
| Priority date | — |
| Expiry date | May 12, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A via-structure off a multilayer interconnection ceramic substrate for a multi-chip module, a semiconductor package and an insulating substrate has a high strength and a high reliability being produced at a low cost. A gap is provided at an interface between a via-conductor and ceramics, and filled with a resin. The resin is preferably of a thermosetting polyimide resin or a benzo-cyclo-butene resin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.