Structure and fabrication process of inductors on semiconductor chip
US5576680A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 1, 1994 |
| Grant date | Nov 19, 1996 |
| Priority date | — |
| Expiry date | Mar 1, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present invention discloses an inductive circuit. The inductive circuit is fabricated on a semiconductor chip including a substrate layer and a dielectric layer. The inductive circuit includes an inductive core composed of high magnetic susceptible material (HMSM) surrounded by an dielectric layer. The dielectric layer which surrounds the inductive core is further surrounded by a conductive line which includes the bottom conductive lines the conductive lines in the `vias` through the surrounding dielectric layer and the top conductive lines. The conductive lines are patterned by employing IC fabrication processes. Thus the inductive core, the dielectric layer surrounding the inductive core, and the surrounding conductive line form an inductive circuit and the inductive circuit is formed on the semi-conductor chip which includes the substrate a layer and a dieletric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.