Method for fabricating an undercoated chip electrically interconnected to a substrate
US5579573A · kind A · utility
68Cited by
17References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 11, 1994 |
| Grant date | Dec 3, 1996 |
| Priority date | — |
| Expiry date | Oct 11, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49146
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
` Method for fabricating an undercoated chip electrically interconnected to a substrate. The method includes the initial step of depositing a predetermined quantity of a liquid undercoat material onto the chip or the substrate. The method continues with the step of interconnecting the chip to the substrate so as to form an electrical interconnection bond therebetween. Finally, the method concludes with the step of heating, reflowing and curing the undercoat material during or after the step of electrically interconnecting the chip to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.