Integrated circuit device implemented using a plurality of partially defective integrated circuit chips
US5581562A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 1994 |
| Grant date | Dec 3, 1996 |
| Priority date | — |
| Expiry date | Oct 19, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit (IC) device implemented according to an architectural design that specifies that the IC device is required to have one functional module, to perform a first function, connected to another functional module, to perform a second function. The IC device includes a first IC chip having a plurality of first functional modules implemented thereon. Some of the first functional modules are defective and others of the first functional modules are non-defective. At least one of the non-defective first functional modules is operable to perform the first function. The IC device also includes a second IC chip having a plurality of second functional modules implemented thereon. Some of the second functional modules are defective and others of the second functional modules are non-defective. At least one of the non-defective second functional modules is operable to perform the second function. The IC device further includes a bus, a first tri-state gate to electrically connect the non-defective first functional module to the bus, and the second tri-state gate to electrically connect the non-defective second functional modules to the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.