Wai-Yan Ho
5Patents
5h-index
3Co-inventors
45Inventor score
Filing activity: Oct 19, 1994 → Sep 30, 1997
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6009251A | Method and system for layout verification of an integrated circuit design with reusable subdesigns | Physics | 353 | Expired |
| US6011911A | Layout overlap detection with selective flattening in computer implemented integrated circuit design | Physics | 128 | Expired |
| US6009250A | Selective flattening in layout areas in computer implemented integrated circuit design | Physics | 86 | Expired |
| US5581742A | Apparatus and method for emulating a microelectronic device by interconnecting and running test vectors on physically implemented functional modules | Physics | 37 | Expired |
| US5581562A | Integrated circuit device implemented using a plurality of partially defective integrated circuit chips | Physics | 34 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.