Apparatus and method for emulating a microelectronic device by interconnecting and running test vectors on physically implemented functional modules
US5581742A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 1994 |
| Grant date | Dec 3, 1996 |
| Priority date | — |
| Expiry date | Nov 30, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/331
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A simulation system for a microelectronic device having two or more functional modules from a megacell library, the simulation system utilizing actual physically implemented versions of each functional module (or block) from the megacell library so as to provide a more accurate and much faster simulation than a comparable software- or field programmable gate array-based simulation. The simulation system comprises means for providing a physically-based implementation of each functional module of a proposed design for a microelectronic device, the physically-based implementation being disposed on one or more test microelectronic devices used by the simulation system. Interconnecting means is used for electrically coupling together each of the physically-based implemented functional modules so as to produce the proposed design of the proposed microelectronic device. Emulation is performed by applying one or more test vectors at a preselected clock speed of the proposed design using the physically-based functional modules electrically coupled together to produce the proposed design, wherein the test vectors can be completed much faster as compared to a comparable software- or field pro…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.