Encapsulated semiconductor chip module and method of forming the same
US5585600A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 1993 |
| Grant date | Dec 17, 1996 |
| Priority date | — |
| Expiry date | Sep 2, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for forming an improved lead-on chip semiconductor module and an improved module of this type. In a lead-on chip semiconductor device, a semiconductor chip which has a major surface having input and output bonding pads thereon, is secured to a lead frame having a plurality of leads adjacent the bonding pads by means of bonding wires connecting a respective one of the leads to a pad on the chip. A coating of dielectric material having a Young's modulus in the range of about 10 psi to about 500 psi is disposed around the entire length of each of the wires and over the pads and over the portion of the respective leads to which the wires are connected to act as a stress buffer. This material preferably has a T.sub.g of at least as low as -40.degree. C. Also preferably this package is encapsulated with conventional encapsulant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.