High resistance polysilicon resistor for integrated circuits and method of fabrication thereof
US5587696A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 1995 |
| Grant date | Dec 24, 1996 |
| Priority date | — |
| Expiry date | Jun 28, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49082
Abstract
A multi-layer polysilicon resistor and a method by which the multi-layer polysilicon resistor is formed. A minimum of two polysilicon layers is formed upon an insulating layer, the insulating layer in turn being formed upon a semiconductor substrate. The first polysilicon layer is formed to a first thickness at a first deposition temperature. The second polysilicon layer is formed directly upon the first polysilicon layer. The second polysilicon layer is formed to a second thickness at a second deposition temperature. The two deposition temperatures are in the range of about 450 degrees centigrade to about 620 degrees centigrade, and the difference in temperature between the first deposition temperature and the second deposition temperature is a minimum of 10 degrees centigrade.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.