Method of reading, erasing and programming a nonvolatile flash-EEPROM memory arrray using source line switching transistors
US5587946A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 1994 |
| Grant date | Dec 24, 1996 |
| Priority date | — |
| Expiry date | Mar 15, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
To reduce read and write errors caused by depleted memory array cells being turned on even when not selected, the nonselected memory cells are so biased as to present a floating terminal and a terminal at a positive voltage with respect to the substrate region. The threshold voltage of nonselected cells (i.e., the minimum voltage between the gate and source terminals for the cell to be turned on) increases due to a "body effect", whereby the threshold voltage depends on the voltage drop between the source terminal and the substrate. The source line of a selected cell is biased to a positive value greater than that of the bit line of the selected cell. Methods for reading, writing and erasing cells using certain voltage levels are disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.