Inventor · Melegnano, IT

Marco Dallabora

44Patents
13h-index
28Co-inventors
81Inventor score

Filing activity: Apr 28, 1988 → Dec 15, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US5784314A Method for setting the threshold voltage of a reference memory cell Physics 66 Expired
US5717636A EEPROM memory with contactless memory cells Electricity 55 Expired
US5754476A Negative charge pump circuit for electrically erasable semiconductor memory devices Electricity 46 Expired
US4888497A Generator of reset pulses upon the rise of the power supply for CMOS-type integrated circuits Electricity 38 Expired
US5999450A Electrically erasable and programmable non-volatile memory device with testable redundancy circuits Physics 33 Expired
US5638327A Flash-EEPROM memory array and method for biasing the same Electricity 30 Expired
US5917753A Sensing circuitry for reading and verifying the contents of electrically programmable/erasable non-volatile memory cells Physics 26 Expired
US5784319A Method for erasing an electrically programmable and erasable non-volatile memory cell Physics 25 Expired
US5179300A Data output stage having feedback loops to precharge the output node Electricity 24 Expired
US5633822A Method of programming a nonvolatile flash-EEPROM memory array using source line switching transistors Physics 24 Expired
US6055187A Sensing circuitry for reading and verifying the contents of electrically programmable/erasable non-volatile memory cells Physics 23 Expired
US5258959A Memory cell reading circuit Physics 19 Expired
US5267202A Reading device for EPROM memory cells with the operational field independent of the threshold jump of the written cells with respect to the virgin cells Physics 17 Expired
US5926059A Stacked Charge pump circuit Electricity 12 Expired
US5587946A Method of reading, erasing and programming a nonvolatile flash-EEPROM memory arrray using source line switching transistors Physics 11 Expired
US6195290A Method of avoiding disturbance during the step of programming and erasing an electrically programmable, semiconductor non-volatile storage device Physics 10 Expired
US5721707A Erase voltage control circuit for an electrically erasable non-volatile memory cell Physics 10 Expired
US5541880A Reference signal generating method and circuit for differential evaluation of the content of nonvolatile memory cells Physics 10 Expired
US6483750B2 Flash EEPROM with on-chip erase source voltage generator Physics 10 Expired
US6195291A Flash EEPROM with on-chip erase source voltage generator Physics 8 Expired
US10083751B1 Data state synchronization Emerging Cross-Sectional Technologies 6 Active
US5854764A Sectorized electrically erasable and programmable non-volatile memory device with redundancy Physics 4 Expired
US10705747B2 Latency-based storage in a hybrid memory system Physics 2 Active
US10261876B2 Memory management Physics 2 Active
US10705963B2 Latency-based storage in a hybrid memory system Physics 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.