Enhanced deep trench storage node capacitance for DRAM

US5592412A · kind A · utility

Assignees

• Siemens Aktiengesellschaft · DE
• International Business Machines Corporation · US
• Kabushiki Kaisha Toshiba · JP

Inventors

• Richard L. Kleinhenz · Wappingers Falls, US
• Karl Paul Muller · Wappingers Falls, US
• Klaus Roithner · Aßling, DE
• Masakatsu Tuschiaki · Fishkill, US

Key dates

• Filing date: Oct 5, 1995
• Grant date: Jan 7, 1997
• Expiry date: Oct 5, 2015

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/711

Abstract

A capacitance storage trench for a DRAM cell includes a trench having at least one sidewall, a bottom wall and a plurality of rods extending away from the bottom wall. The at least one sidewall, the bottom wall and the rods are coated with a capacitive dielectric layer. A layer of semiconductive material is disposed over the dielectric layer. The plurality of rods expand the overall surface area of the trench and thus, provide a significant increase in capacitance storage of the storage trench. The capacitance storage trench is formed in a method which includes the steps of forming a plurality of buried oxygen precipitates in a selected region of a substrate and using the oxygen precipitates as micromasks during a conventional trench etch process.