High speed network switch
US5604735A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 1995 |
| Grant date | Feb 18, 1997 |
| Priority date | — |
| Expiry date | May 12, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L49/254
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention provides an improvement in circuit switching for a network comprising a switching apparatus including a plurality of transceivers for interfacing directly with a like plurality of nodes. Each of the transceivers has a receive and transmit through port for passing data to and from nodes. Transmitted data includes a connect/disconnect sequence, a first wait sequence, and user data. The switching apparatus further includes circuitry for isolating each transceiver so as to loop back data when not in use and a switching matrix for directly connecting any pair of transceivers. Each of the transceivers includes circuitry for detecting a connect and disconnect sequence and an interface for connection to a serial asynchronous receiver to derive node requests, routing data, priority and other information from the connect sequence detected at the transceiver. Derived switch configuration requests are processed by a node route control state machine, with each node route control state machine integrated in a bus architecture for configuring the matrix switch. A bus arbitration state machine controls the bus architecture servicing bus requests and providing bus grants for t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.