Method and structure for polishing a wafer during manufacture of integrated circuits
US5607341A · kind A · utility
Inventor
Key dates
| Filing date | Aug 8, 1994 |
| Grant date | Mar 4, 1997 |
| Priority date | — |
| Expiry date | Aug 8, 2014 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB24B37/11
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A number of blocks are reciprocably supported in a polishing apparatus in accordance with this invention, entirely independent of each other so that lifting motion of one block is not transferred to an adjacent block, thus providing flexibility to follow the global curvature of the wafer. The polishing apparatus uses a block of a very hard design to ensure minimal deflection of the block into the microstructure of the wafer. Each block removes a portion of the wafer using relative motion between the block and the wafer. Each block is supported by at least three regions of the wafer during the relative motion, wherein each of the regions has the slowest rate of material removal in a die enclosing that region. In one embodiment, the smallest dimension of a block is approximately three times the size of the side of a die. The three point support and hard design of the blocks ensure local polishing removal uniformity while the independent support of the blocks ensures global uniformity, thus achieving an advantage over the conventional polishing process and apparatus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.