Structure and fabrication method for a thin film transistor
US5607865A · kind A · utility
14Cited by
4References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 27, 1995 |
| Grant date | Mar 4, 1997 |
| Priority date | — |
| Expiry date | Jan 27, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/024
Abstract
A structure and fabrication method for a thin film transistor which is suitable for an SRAM memory cell. The thin film transistor structure includes an insulating substrate and a semiconductor layer formed as a wall on the insulation substrate. A gate insulation film is formed on the semiconductor layer and over the entire surface of the insulation substrate. A gate electrode formed on the gate insulation film at the center part of the semiconductor layer. Impurity regions are formed in the semiconductor layer on both sides of the gate electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.