Clamp circuit for read-only-memory devices
US5612915A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 1996 |
| Grant date | Mar 18, 1997 |
| Priority date | — |
| Expiry date | Jan 25, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A clamp circuit for a read-only-memory (ROM) device provides clamp voltages which can uniformly compensate for the parasitic capacitance on ROM word lines and improve the performance of the ROM device. The clamp circuit includes an active load, a plurality of amplifiers and a transmission gate. The amplifiers have various trip voltages and are controlled by different decoding signals for providing various clamp voltages to different word lines in the ROM device. Each amplifier is composed of a NOR gate and a transistor. The amplifier trip voltages can be easily set to desired values when designing NOR gate layout patterns without additional complicated processes being introduced into the fabrication methodology of a semiconductor integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.