Dual purpose security architecture with protected internal operating system
US5615263A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 6, 1995 |
| Grant date | Mar 25, 1997 |
| Priority date | — |
| Expiry date | Jan 6, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06Q20/3227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A secure mode within a dual mode processor is implemented. In a general/external mode, the dual mode processor executes instructions provided from an external source. The instructions are supplied to the processor via input/output to the processor. Upon receiving a special software or hardware interrupt, the dual mode processor enters a secure/internal mode. The interrupt specifies a secure function stored in a read-only memory within the dual mode processor. Upon receiving such an interrupt, input/output to the dual mode processor is disabled. The identified secure function is executed by the processor. During execution of the secure function, any attempt to insert instructions not originating from the read-only memory are ignored. However, the processor may access data specifically identified by secure function being executed. Upon completion of performance of the secure function, an exit routine is executed to enable input/output to the processor and resume execution of instructions provided via input/output from the source external to the processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.